NXP LPC4350 IAR Port using Hitex LPC4350 Eval Board

This demo is for the use with the Hitex LPC4350 evaluation board which incorporates the NXP LPC4350 Dual Core processor. This application runs on the M4 core. The M0 core is not used in this application. The compiler used was IAR EWARM Version 6.30.4. The demo is configured to run in the external NOR flash. The project was based on the CORTEX_M4F_M0_LPC43xx_Keil demonstration code but uses the FreeRTPS_7.1.0\Source\portable\IAR\ARM_CM4F port  layer.

Several files from the NXP LPC4350 CMSIS driver library are included in this application. A snapshot version of the library was obtained from sw.lpcware.com on 1/19/2012 for use with this demonstration. All of the files from this library that are used in the application are included in the LPC4350_PDL_CMSIS folder of this project.

Compiler Warnings: Several warnings are generated during the compilation process. The unrecognized #pragma warning is caused by the use of the #pragma
push" which is included in the NXP LPC4350 PDL library. This warning doesn't seem to have any adverse effects on the application although I have not fully investigated how this should be corrected. The following warning is also generated during the compile: "undefined behavior: the order of volatile accesses is undefined in this statement". As before, this warning doesn't seem to have any adverse effects on the operation of the application. This issue also needs to be investigated to provide a solution.

Have fun and I hope this helps someone out. Thanks very much to Richard Barry and everyone who helps to make FreeRTOS a wonderful tool that everyone can use.

Greg Dunn
Eagle Research Corporation



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