FreeRTOS 7.1 Port for Aurix (TC27x), using Free Entry Toolchain

The demonstration projects shows how to start up all 3 cores and running
their own instance of FreeRTOS on it. It is intended to be compiled
using the Free Entry Toolchain provided by Infineon and run on a Eval board
"Application Kit TC2X7 V1.0", equipped with a TC277 Step C controller.
You'll need to compile the project with the "-fdollars-in-identifiers" option!

As part of the demonstration, a mini web server is started on the port, using
the MAC address CAFE000001 and the static IP address (main1.c).
Furthermore some tasks for demonstrating the inter-core communication are
started and a heart-beat task flashing LED 13.0 is running in the background.

Because of the local memory map vs. global memory map of the AURIX MC
devices, quite some memory is wasted because the compiler is not aware
of the local memory at 0xD000000. Thus all global variables are available
on all three cores, but typically they are only used in one core, on the
other cores the same memory range is 'wasted'.
A work around is using the heap and stack memory, because every core
maintains its own heap and every task has its own stack...

For inter-core communication a Shared Memory Fifo has been implemented.
See sharedmem.c of how to use it!

Have fun working with FreeRTOS on the Aurix controller family!

Porting done by Virtual Vehicle Research and Competence Center
Author: Allan Tengg (allan.tengg@v2c2.at)




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