Hi all,
This is a port of FreeRTOS 6.1.0 to ATxmega128A1. The original AVR port has been modified accordingly (24 bit addressing, saving extension registers, handling multilevel interrupts, etc.).
Regards,
Geza
freertos_atxmega128a1_6_1_0.zip
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goergev Great to see this port! I am just analysing it :-)
The point that I saw is in the restore context macro.
The following sequence is used to write to the SP:
cli ; The next thing on the stack is the ...
out SPH, r31 ; ... hardware stack pointer.
out SPL, r0 ; Interrupts need to be disabled during ...
sei ; ... this.I am quite sure that you don't need the cli/sei since the xmega manual says (section 3.8):
"To prevent corruption when updating the Stack Pointer from software, a write to SPL will automatically
disable interrupts for up to 4 instructions or until the next I/O memory write.
".Just as a hint to make the context switch a bit faster.
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Geza Balazs Hi goergev,
Thanks for the hint. I was running my design under heavy interrupt load in AVR Studio when I encountered that there was a return address in the middle of the stack of one process. That's why I added cli and sei. I remembered something like that you wrote from an ATmega doc, but I didn't look this up in the Xmega datasheet. Anyway, the problem is that SPH is written before SPL, so - in this form - taking out cli and sei does not solve the problem. I am going to change the stack topology so that SP is stored little endian (instead of being stored as big endian in the current AVR port) which will also eliminate the need to use r0, too.
Regards,
Geza
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