41 #define CHIP_FREQ_XTAL_12M (12000000UL)
43 #define Slow_Clock_Xtal
45 #if (!defined CHIP_FREQ_XTAL)
46 # define CHIP_FREQ_XTAL CHIP_FREQ_XTAL_12M
68 EFC0->EEFC_FMR = EEFC_FMR_FWS(5) | EEFC_FMR_CLOE;
70 #ifdef Slow_Clock_Xtal
73 SUPC->SUPC_CR = SUPC_CR_XTALSEL_CRYSTAL_SEL | SUPC_CR_KEY_PASSWD;
76 while(!(SUPC->SUPC_SR & SUPC_SR_OSCSEL));
78 #endif // Slow_CLock_Xtal
87 PMC->CKGR_MOR = (PMC->CKGR_MOR & ~CKGR_MOR_MOSCXTBY) | CKGR_MOR_KEY_PASSWD | CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCXTST(0x40U);
90 while(!(PMC->PMC_SR & PMC_SR_MOSCXTS));
93 PMC->CKGR_MOR |= CKGR_MOR_KEY_PASSWD | CKGR_MOR_MOSCSEL;
96 while(!(PMC->PMC_SR & PMC_SR_MOSCSELS));
99 while(!(PMC->CKGR_MCFR & CKGR_MCFR_MAINFRDY));
102 PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | CKGR_PLLAR_MULA(0);
105 PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | CKGR_PLLAR_DIVA(1) | CKGR_PLLAR_PLLACOUNT(0x3fU) | CKGR_PLLAR_MULA(19);
108 while(!(PMC->PMC_SR & PMC_SR_LOCKA));
111 PMC->PMC_MCKR = (PMC->PMC_MCKR & ~PMC_MCKR_PRES_Msk) | PMC_MCKR_PRES_CLK_2;
114 while(!(PMC->PMC_SR & PMC_SR_MCKRDY));
117 PMC->PMC_MCKR = (PMC->PMC_MCKR & ~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_PLLA_CLK;
120 while(!(PMC->PMC_SR & PMC_SR_MCKRDY));
122 #ifndef KEEP_WATCHDOG_AT_INIT
125 WDT->WDT_MR = WDT_MR_WDDIS;
139 switch ( PMC->PMC_MCKR & (uint32_t) PMC_MCKR_CSS_Msk )
141 case PMC_MCKR_CSS_SLOW_CLK:
142 if ( SUPC->SUPC_SR & SUPC_SR_OSCSEL )
144 SystemCoreClock = CHIP_FREQ_XTAL_32K;
148 SystemCoreClock = CHIP_FREQ_SLCK_RC;
152 case PMC_MCKR_CSS_MAIN_CLK:
153 if ( PMC->CKGR_MOR & CKGR_MOR_MOSCSEL )
159 SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
161 switch ( PMC->CKGR_MOR & CKGR_MOR_MOSCRCF_Msk )
163 case CKGR_MOR_MOSCRCF_4_MHz:
164 SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
167 case CKGR_MOR_MOSCRCF_8_MHz:
168 SystemCoreClock = CHIP_FREQ_MAINCK_RC_8MHZ;
171 case CKGR_MOR_MOSCRCF_12_MHz:
172 SystemCoreClock = CHIP_FREQ_MAINCK_RC_12MHZ;
181 case PMC_MCKR_CSS_PLLA_CLK:
182 case PMC_MCKR_CSS_PLLB_CLK:
183 if ( PMC->CKGR_MOR & CKGR_MOR_MOSCSEL )
189 SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
191 switch ( PMC->CKGR_MOR & CKGR_MOR_MOSCRCF_Msk )
193 case CKGR_MOR_MOSCRCF_4_MHz:
194 SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
197 case CKGR_MOR_MOSCRCF_8_MHz:
198 SystemCoreClock = CHIP_FREQ_MAINCK_RC_8MHZ;
201 case CKGR_MOR_MOSCRCF_12_MHz:
202 SystemCoreClock = CHIP_FREQ_MAINCK_RC_12MHZ;
210 if ( (uint32_t)(PMC->PMC_MCKR & (uint32_t) PMC_MCKR_CSS_Msk) == PMC_MCKR_CSS_PLLA_CLK )
212 SystemCoreClock *= ((((PMC->CKGR_PLLAR) & CKGR_PLLAR_MULA_Msk) >> CKGR_PLLAR_MULA_Pos) + 1U);
213 SystemCoreClock /= ((((PMC->CKGR_PLLAR) & CKGR_PLLAR_DIVA_Msk) >> CKGR_PLLAR_DIVA_Pos));
217 SystemCoreClock *= ((((PMC->CKGR_PLLBR) & CKGR_PLLBR_MULB_Msk) >> CKGR_PLLBR_MULB_Pos) + 1U);
218 SystemCoreClock /= ((((PMC->CKGR_PLLBR) & CKGR_PLLBR_DIVB_Msk) >> CKGR_PLLBR_DIVB_Pos));
226 if ( (PMC->PMC_MCKR & PMC_MCKR_PRES_Msk) == PMC_MCKR_PRES_CLK_3 )
228 SystemCoreClock /= 3U;
232 SystemCoreClock >>= ((PMC->PMC_MCKR & PMC_MCKR_PRES_Msk) >> PMC_MCKR_PRES_Pos);
244 #if !defined(ID_EFC1)
245 if ( ul_clk < CHIP_FREQ_FWS_0 )
247 EFC0->EEFC_FMR = EEFC_FMR_FWS(0);
251 if ( ul_clk < CHIP_FREQ_FWS_1 )
253 EFC0->EEFC_FMR = EEFC_FMR_FWS(1);
257 if ( ul_clk < CHIP_FREQ_FWS_2 )
259 EFC0->EEFC_FMR = EEFC_FMR_FWS(2);
263 if ( ul_clk < CHIP_FREQ_FWS_3 )
265 EFC0->EEFC_FMR = EEFC_FMR_FWS(3);
269 if ( ul_clk < CHIP_FREQ_FWS_4 )
271 EFC0->EEFC_FMR = EEFC_FMR_FWS(4);
275 EFC0->EEFC_FMR = EEFC_FMR_FWS(5);
282 if ( ul_clk < CHIP_FREQ_FWS_0 )
284 EFC0->EEFC_FMR = EEFC_FMR_FWS(0);
285 EFC1->EEFC_FMR = EEFC_FMR_FWS(0);
289 if ( ul_clk < CHIP_FREQ_FWS_1 )
291 EFC0->EEFC_FMR = EEFC_FMR_FWS(1);
292 EFC1->EEFC_FMR = EEFC_FMR_FWS(1);
296 if ( ul_clk < CHIP_FREQ_FWS_2 )
298 EFC0->EEFC_FMR = EEFC_FMR_FWS(2);
299 EFC1->EEFC_FMR = EEFC_FMR_FWS(2);
303 if ( ul_clk < CHIP_FREQ_FWS_3 )
305 EFC0->EEFC_FMR = EEFC_FMR_FWS(3);
306 EFC1->EEFC_FMR = EEFC_FMR_FWS(3);
310 if ( ul_clk < CHIP_FREQ_FWS_4 )
312 EFC0->EEFC_FMR = EEFC_FMR_FWS(4);
313 EFC1->EEFC_FMR = EEFC_FMR_FWS(4);
317 EFC0->EEFC_FMR = EEFC_FMR_FWS(5);
318 EFC1->EEFC_FMR = EEFC_FMR_FWS(5);
void SystemInit(void)
Setup the microcontroller system.
void SystemCoreClockUpdate(void)
Get Core Clock Frequency.
void system_init_flash(uint32_t ul_clk)
Initialize flash wait state according to operating frequency.