SAM4S-EK_FreeRTOS+FAT-SL  1.0
An example project to test the functionality of FreeRTOS+FAT-SL using SD card as data storage medium
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port.c
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65 
66 /*-----------------------------------------------------------
67  * Implementation of functions defined in portable.h for the ARM CM3 port.
68  *----------------------------------------------------------*/
69 
70 /* Scheduler includes. */
71 #include "FreeRTOS.h"
72 #include "task.h"
73 
74 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
75 defined. The value should also ensure backward compatibility.
76 FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
77 #ifndef configKERNEL_INTERRUPT_PRIORITY
78  #define configKERNEL_INTERRUPT_PRIORITY 255
79 #endif
80 
81 #ifndef configSYSTICK_CLOCK_HZ
82  #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
83  /* Ensure the SysTick is clocked at the same frequency as the core. */
84  #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
85 #else
86  /* The way the SysTick is clocked is not modified in case it is not the same
87  as the core. */
88  #define portNVIC_SYSTICK_CLK_BIT ( 0 )
89 #endif
90 
91 /* Constants required to manipulate the core. Registers first... */
92 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
93 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
94 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
95 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
96 /* ...then bits in the registers. */
97 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
98 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
99 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
100 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
101 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
102 
103 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
104 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
105 
106 /* Constants required to check the validity of an interrupt priority. */
107 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
108 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
109 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
110 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
111 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
112 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
113 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
114 #define portPRIGROUP_SHIFT ( 8UL )
115 
116 /* Constants required to set up the initial stack. */
117 #define portINITIAL_XPSR ( 0x01000000UL )
118 
119 /* The systick is a 24-bit counter. */
120 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
121 
122 /* A fiddle factor to estimate the number of SysTick counts that would have
123 occurred while the SysTick counter is stopped during tickless idle
124 calculations. */
125 #define portMISSED_COUNTS_FACTOR ( 45UL )
126 
127 /* Let the user override the pre-loading of the initial LR with the address of
128 prvTaskExitError() in case is messes up unwinding of the stack in the
129 debugger. */
130 #ifdef configTASK_RETURN_ADDRESS
131  #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
132 #else
133  #define portTASK_RETURN_ADDRESS prvTaskExitError
134 #endif
135 
136 /* Each task maintains its own interrupt status in the critical nesting
137 variable. */
138 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
139 
140 /*
141  * Setup the timer to generate the tick interrupts. The implementation in this
142  * file is weak to allow application writers to change the timer used to
143  * generate the tick interrupt.
144  */
145 void vPortSetupTimerInterrupt( void );
146 
147 /*
148  * Exception handlers.
149  */
150 void xPortPendSVHandler( void ) __attribute__ (( naked ));
151 void xPortSysTickHandler( void );
152 void vPortSVCHandler( void ) __attribute__ (( naked ));
153 
154 /*
155  * Start first task is a separate function so it can be tested in isolation.
156  */
157 static void prvPortStartFirstTask( void ) __attribute__ (( naked ));
158 
159 /*
160  * Used to catch tasks that attempt to return from their implementing function.
161  */
162 static void prvTaskExitError( void );
163 
164 /*-----------------------------------------------------------*/
165 
166 /*
167  * The number of SysTick increments that make up one tick period.
168  */
169 #if configUSE_TICKLESS_IDLE == 1
170  static uint32_t ulTimerCountsForOneTick = 0;
171 #endif /* configUSE_TICKLESS_IDLE */
172 
173 /*
174  * The maximum number of tick periods that can be suppressed is limited by the
175  * 24 bit resolution of the SysTick timer.
176  */
177 #if configUSE_TICKLESS_IDLE == 1
178  static uint32_t xMaximumPossibleSuppressedTicks = 0;
179 #endif /* configUSE_TICKLESS_IDLE */
180 
181 /*
182  * Compensate for the CPU cycles that pass while the SysTick is stopped (low
183  * power functionality only.
184  */
185 #if configUSE_TICKLESS_IDLE == 1
186  static uint32_t ulStoppedTimerCompensation = 0;
187 #endif /* configUSE_TICKLESS_IDLE */
188 
189 /*
190  * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
191  * FreeRTOS API functions are not called from interrupts that have been assigned
192  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
193  */
194 #if ( configASSERT_DEFINED == 1 )
195  static uint8_t ucMaxSysCallPriority = 0;
196  static uint32_t ulMaxPRIGROUPValue = 0;
197  static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
198 #endif /* configASSERT_DEFINED */
199 
200 /*-----------------------------------------------------------*/
201 
202 /*
203  * See header file for description.
204  */
205 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
206 {
207  /* Simulate the stack frame as it would be created by a context switch
208  interrupt. */
209  pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
210  *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
211  pxTopOfStack--;
212  *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
213  pxTopOfStack--;
214  *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
215  pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
216  *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
217  pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
218 
219  return pxTopOfStack;
220 }
221 /*-----------------------------------------------------------*/
222 
223 static void prvTaskExitError( void )
224 {
225  /* A function that implements a task must not exit or attempt to return to
226  its caller as there is nothing to return to. If a task wants to exit it
227  should instead call vTaskDelete( NULL ).
228 
229  Artificially force an assert() to be triggered if configASSERT() is
230  defined, then stop here so application writers can catch the error. */
231  configASSERT( uxCriticalNesting == ~0UL );
233  for( ;; );
234 }
235 /*-----------------------------------------------------------*/
236 
237 void vPortSVCHandler( void )
238 {
239  __asm volatile (
240  " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
241  " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
242  " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
243  " ldmia r0!, {r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
244  " msr psp, r0 \n" /* Restore the task stack pointer. */
245  " isb \n"
246  " mov r0, #0 \n"
247  " msr basepri, r0 \n"
248  " orr r14, #0xd \n"
249  " bx r14 \n"
250  " \n"
251  " .align 2 \n"
252  "pxCurrentTCBConst2: .word pxCurrentTCB \n"
253  );
254 }
255 /*-----------------------------------------------------------*/
256 
257 static void prvPortStartFirstTask( void )
258 {
259  __asm volatile(
260  " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
261  " ldr r0, [r0] \n"
262  " ldr r0, [r0] \n"
263  " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
264  " cpsie i \n" /* Globally enable interrupts. */
265  " dsb \n"
266  " isb \n"
267  " svc 0 \n" /* System call to start first task. */
268  " nop \n"
269  );
270 }
271 /*-----------------------------------------------------------*/
272 
273 /*
274  * See header file for description.
275  */
277 {
278  /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
279  See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
281 
282  #if( configASSERT_DEFINED == 1 )
283  {
284  volatile uint32_t ulOriginalPriority;
285  volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
286  volatile uint8_t ucMaxPriorityValue;
287 
288  /* Determine the maximum priority from which ISR safe FreeRTOS API
289  functions can be called. ISR safe functions are those that end in
290  "FromISR". FreeRTOS maintains separate thread and ISR API functions to
291  ensure interrupt entry is as fast and simple as possible.
292 
293  Save the interrupt priority value that is about to be clobbered. */
294  ulOriginalPriority = *pucFirstUserPriorityRegister;
295 
296  /* Determine the number of priority bits available. First write to all
297  possible bits. */
298  *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
299 
300  /* Read the value back to see how many bits stuck. */
301  ucMaxPriorityValue = *pucFirstUserPriorityRegister;
302 
303  /* Use the same mask on the maximum system call priority. */
304  ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
305 
306  /* Calculate the maximum acceptable priority group value for the number
307  of bits read back. */
308  ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
309  while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
310  {
311  ulMaxPRIGROUPValue--;
312  ucMaxPriorityValue <<= ( uint8_t ) 0x01;
313  }
314 
315  /* Shift the priority group value back to its position within the AIRCR
316  register. */
317  ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
318  ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
319 
320  /* Restore the clobbered interrupt priority register to its original
321  value. */
322  *pucFirstUserPriorityRegister = ulOriginalPriority;
323  }
324  #endif /* conifgASSERT_DEFINED */
325 
326  /* Make PendSV and SysTick the lowest priority interrupts. */
329 
330  /* Start the timer that generates the tick ISR. Interrupts are disabled
331  here already. */
333 
334  /* Initialise the critical nesting count ready for the first task. */
335  uxCriticalNesting = 0;
336 
337  /* Start the first task. */
338  prvPortStartFirstTask();
339 
340  /* Should never get here as the tasks will now be executing! Call the task
341  exit error function to prevent compiler warnings about a static function
342  not being called in the case that the application writer overrides this
343  functionality by defining configTASK_RETURN_ADDRESS. */
344  prvTaskExitError();
345 
346  /* Should not get here! */
347  return 0;
348 }
349 /*-----------------------------------------------------------*/
350 
351 void vPortEndScheduler( void )
352 {
353  /* Not implemented in ports where there is nothing to return to.
354  Artificially force an assert. */
355  configASSERT( uxCriticalNesting == 1000UL );
356 }
357 /*-----------------------------------------------------------*/
358 
359 void vPortYield( void )
360 {
361  /* Set a PendSV to request a context switch. */
363 
364  /* Barriers are normally not required but do ensure the code is completely
365  within the specified behaviour for the architecture. */
366  __asm volatile( "dsb" );
367  __asm volatile( "isb" );
368 }
369 /*-----------------------------------------------------------*/
370 
371 void vPortEnterCritical( void )
372 {
374  uxCriticalNesting++;
375  __asm volatile( "dsb" );
376  __asm volatile( "isb" );
377 }
378 /*-----------------------------------------------------------*/
379 
380 void vPortExitCritical( void )
381 {
382  configASSERT( uxCriticalNesting );
383  uxCriticalNesting--;
384  if( uxCriticalNesting == 0 )
385  {
387  }
388 }
389 /*-----------------------------------------------------------*/
390 
391 __attribute__(( naked )) uint32_t ulPortSetInterruptMask( void )
392 {
393  __asm volatile \
394  ( \
395  " mrs r0, basepri \n" \
396  " mov r1, %0 \n" \
397  " msr basepri, r1 \n" \
398  " bx lr \n" \
399  :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "r0", "r1" \
400  );
401 
402  /* This return will not be reached but is necessary to prevent compiler
403  warnings. */
404  return 0;
405 }
406 /*-----------------------------------------------------------*/
407 
408 __attribute__(( naked )) void vPortClearInterruptMask( uint32_t ulNewMaskValue )
409 {
410  __asm volatile \
411  ( \
412  " msr basepri, r0 \n" \
413  " bx lr \n" \
414  :::"r0" \
415  );
416 
417  /* Just to avoid compiler warnings. */
418  ( void ) ulNewMaskValue;
419 }
420 /*-----------------------------------------------------------*/
421 
422 void xPortPendSVHandler( void )
423 {
424  /* This is a naked function. */
425 
426  __asm volatile
427  (
428  " mrs r0, psp \n"
429  " isb \n"
430  " \n"
431  " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
432  " ldr r2, [r3] \n"
433  " \n"
434  " stmdb r0!, {r4-r11} \n" /* Save the remaining registers. */
435  " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
436  " \n"
437  " stmdb sp!, {r3, r14} \n"
438  " mov r0, %0 \n"
439  " msr basepri, r0 \n"
440  " bl vTaskSwitchContext \n"
441  " mov r0, #0 \n"
442  " msr basepri, r0 \n"
443  " ldmia sp!, {r3, r14} \n"
444  " \n" /* Restore the context, including the critical nesting count. */
445  " ldr r1, [r3] \n"
446  " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
447  " ldmia r0!, {r4-r11} \n" /* Pop the registers. */
448  " msr psp, r0 \n"
449  " isb \n"
450  " bx r14 \n"
451  " \n"
452  " .align 2 \n"
453  "pxCurrentTCBConst: .word pxCurrentTCB \n"
455  );
456 }
457 /*-----------------------------------------------------------*/
458 
460 {
461  /* The SysTick runs at the lowest interrupt priority, so when this interrupt
462  executes all interrupts must be unmasked. There is therefore no need to
463  save and then restore the interrupt mask value as its value is already
464  known. */
466  {
467  /* Increment the RTOS tick. */
468  if( xTaskIncrementTick() != pdFALSE )
469  {
470  /* A context switch is required. Context switching is performed in
471  the PendSV interrupt. Pend the PendSV interrupt. */
473  }
474  }
476 }
477 /*-----------------------------------------------------------*/
478 
479 #if configUSE_TICKLESS_IDLE == 1
480 
481  __attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
482  {
483  uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
484  TickType_t xModifiableIdleTime;
485 
486  /* Make sure the SysTick reload value does not overflow the counter. */
487  if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
488  {
489  xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
490  }
491 
492  /* Stop the SysTick momentarily. The time the SysTick is stopped for
493  is accounted for as best it can be, but using the tickless mode will
494  inevitably result in some tiny drift of the time maintained by the
495  kernel with respect to calendar time. */
497 
498  /* Calculate the reload value required to wait xExpectedIdleTime
499  tick periods. -1 is used because this code will execute part way
500  through one of the tick periods. */
501  ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
502  if( ulReloadValue > ulStoppedTimerCompensation )
503  {
504  ulReloadValue -= ulStoppedTimerCompensation;
505  }
506 
507  /* Enter a critical section but don't use the taskENTER_CRITICAL()
508  method as that will mask interrupts that should exit sleep mode. */
509  __asm volatile( "cpsid i" );
510 
511  /* If a context switch is pending or a task is waiting for the scheduler
512  to be unsuspended then abandon the low power entry. */
514  {
515  /* Restart from whatever is left in the count register to complete
516  this tick period. */
518 
519  /* Restart SysTick. */
521 
522  /* Reset the reload register to the value required for normal tick
523  periods. */
524  portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
525 
526  /* Re-enable interrupts - see comments above the cpsid instruction()
527  above. */
528  __asm volatile( "cpsie i" );
529  }
530  else
531  {
532  /* Set the new reload value. */
533  portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
534 
535  /* Clear the SysTick count flag and set the count value back to
536  zero. */
538 
539  /* Restart SysTick. */
541 
542  /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
543  set its parameter to 0 to indicate that its implementation contains
544  its own wait for interrupt or wait for event instruction, and so wfi
545  should not be executed again. However, the original expected idle
546  time variable must remain unmodified, so a copy is taken. */
547  xModifiableIdleTime = xExpectedIdleTime;
548  configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
549  if( xModifiableIdleTime > 0 )
550  {
551  __asm volatile( "dsb" );
552  __asm volatile( "wfi" );
553  __asm volatile( "isb" );
554  }
555  configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
556 
557  /* Stop SysTick. Again, the time the SysTick is stopped for is
558  accounted for as best it can be, but using the tickless mode will
559  inevitably result in some tiny drift of the time maintained by the
560  kernel with respect to calendar time. */
561  ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
563 
564  /* Re-enable interrupts - see comments above the cpsid instruction()
565  above. */
566  __asm volatile( "cpsie i" );
567 
568  if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
569  {
570  uint32_t ulCalculatedLoadValue;
571 
572  /* The tick interrupt has already executed, and the SysTick
573  count reloaded with ulReloadValue. Reset the
574  portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
575  period. */
576  ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
577 
578  /* Don't allow a tiny value, or values that have somehow
579  underflowed because the post sleep hook did something
580  that took too long. */
581  if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
582  {
583  ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
584  }
585 
586  portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
587 
588  /* The tick interrupt handler will already have pended the tick
589  processing in the kernel. As the pending tick will be
590  processed as soon as this function exits, the tick value
591  maintained by the tick is stepped forward by one less than the
592  time spent waiting. */
593  ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
594  }
595  else
596  {
597  /* Something other than the tick interrupt ended the sleep.
598  Work out how long the sleep lasted rounded to complete tick
599  periods (not the ulReload value which accounted for part
600  ticks). */
601  ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
602 
603  /* How many complete tick periods passed while the processor
604  was waiting? */
605  ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
606 
607  /* The reload value is set to whatever fraction of a single tick
608  period remains. */
609  portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
610  }
611 
612  /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
613  again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
614  value. The critical section is used to ensure the tick interrupt
615  can only execute once in the case that the reload register is near
616  zero. */
619  {
621  vTaskStepTick( ulCompleteTickPeriods );
622  portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
623  }
625  }
626  }
627 
628 #endif /* #if configUSE_TICKLESS_IDLE */
629 /*-----------------------------------------------------------*/
630 
631 /*
632  * Setup the systick timer to generate the tick interrupts at the required
633  * frequency.
634  */
636 {
637  /* Calculate the constants required to configure the tick interrupt. */
638  #if configUSE_TICKLESS_IDLE == 1
639  {
640  ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
641  xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
642  ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
643  }
644  #endif /* configUSE_TICKLESS_IDLE */
645 
646  /* Configure SysTick to interrupt at the requested rate. */
649 }
650 /*-----------------------------------------------------------*/
651 
652 #if( configASSERT_DEFINED == 1 )
653 
654  void vPortValidateInterruptPriority( void )
655  {
656  uint32_t ulCurrentInterrupt;
657  uint8_t ucCurrentPriority;
658 
659  /* Obtain the number of the currently executing interrupt. */
660  __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );
661 
662  /* Is the interrupt number a user defined interrupt? */
663  if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
664  {
665  /* Look up the interrupt's priority. */
666  ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
667 
668  /* The following assertion will fail if a service routine (ISR) for
669  an interrupt that has been assigned a priority above
670  configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
671  function. ISR safe FreeRTOS API functions must *only* be called
672  from interrupts that have been assigned a priority at or below
673  configMAX_SYSCALL_INTERRUPT_PRIORITY.
674 
675  Numerically low interrupt priority numbers represent logically high
676  interrupt priorities, therefore the priority of the interrupt must
677  be set to a value equal to or numerically *higher* than
678  configMAX_SYSCALL_INTERRUPT_PRIORITY.
679 
680  Interrupts that use the FreeRTOS API must not be left at their
681  default priority of zero as that is the highest possible priority,
682  which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
683  and therefore also guaranteed to be invalid.
684 
685  FreeRTOS maintains separate thread and ISR API functions to ensure
686  interrupt entry is as fast and simple as possible.
687 
688  The following links provide detailed information:
689  http://www.freertos.org/RTOS-Cortex-M3-M4.html
690  http://www.freertos.org/FAQHelp.html */
691  configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
692  }
693 
694  /* Priority grouping: The interrupt controller (NVIC) allows the bits
695  that define each interrupt's priority to be split between bits that
696  define the interrupt's pre-emption priority bits and bits that define
697  the interrupt's sub-priority. For simplicity all bits must be defined
698  to be pre-emption priority bits. The following assertion will fail if
699  this is not the case (if some bits represent a sub-priority).
700 
701  If the application only uses CMSIS libraries for interrupt
702  configuration then the correct setting can be achieved on all Cortex-M
703  devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
704  scheduler. Note however that some vendor specific peripheral libraries
705  assume a non-zero priority group setting, in which cases using a value
706  of zero will result in unpredicable behaviour. */
707  configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
708  }
709 
710 #endif /* configASSERT_DEFINED */
711 
712 
713 
714 
715 
716 
717 
718 
719 
720 
721 
722 
723 
724 
725 
726 
727 
728 
729 
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731 
#define portNVIC_SYSTICK_CLK_BIT
Definition: port.c:84
BaseType_t xPortStartScheduler(void)
Definition: port.c:276
void xPortPendSVHandler(void xPortSysTickHandler void)
Definition: port.c:150
#define portMISSED_COUNTS_FACTOR
Definition: port.c:125
void xPortSysTickHandler(void)
Definition: port.c:459
#define portENABLE_INTERRUPTS()
Definition: portmacro.h:130
#define configASSERT(x)
void vPortClearInterruptMask(uint32_t ulNewMaskValue)
#define portDISABLE_INTERRUPTS()
Definition: portmacro.h:129
#define portPRIGROUP_SHIFT
Definition: port.c:114
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(uxSavedStatusValue)
Definition: FreeRTOS.h:294
#define portTOP_BIT_OF_BYTE
Definition: port.c:111
void vPortEnterCritical(void)
Definition: port.c:371
#define portNVIC_SYSPRI2_REG
Definition: port.c:95
void vPortSVCHandler(void)
Definition: port.c:237
unsigned long UBaseType_t
Definition: portmacro.h:95
void vPortEndScheduler(void)
Definition: port.c:351
#define portNVIC_SYSTICK_PRI
Definition: port.c:104
void vPortSuppressTicksAndSleep(TickType_t xExpectedIdleTime)
uint32_t TickType_t
Definition: portmacro.h:101
#define portINITIAL_XPSR
Definition: port.c:117
void vTaskStepTick(const TickType_t xTicksToJump) PRIVILEGED_FUNCTION
#define portSET_INTERRUPT_MASK_FROM_ISR()
Definition: FreeRTOS.h:290
#define configPOST_SLEEP_PROCESSING(x)
Definition: FreeRTOS.h:681
#define portPRIORITY_GROUP_MASK
Definition: port.c:113
StackType_t * pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters) PRIVILEGED_FUNCTION
#define configCPU_CLOCK_HZ
#define portNVIC_PENDSV_PRI
Definition: port.c:103
#define configMAX_SYSCALL_INTERRUPT_PRIORITY
#define portAIRCR_REG
Definition: port.c:109
#define portNVIC_SYSTICK_LOAD_REG
Definition: port.c:93
#define portNVIC_SYSTICK_CURRENT_VALUE_REG
Definition: port.c:94
#define configTICK_RATE_HZ
#define portMAX_PRIGROUP_BITS
Definition: port.c:112
long BaseType_t
Definition: portmacro.h:94
#define portEXIT_CRITICAL()
Definition: portmacro.h:132
#define portFIRST_USER_INTERRUPT_NUMBER
Definition: port.c:107
void vPortYield(void)
Definition: port.c:359
#define configPRE_SLEEP_PROCESSING(x)
Definition: FreeRTOS.h:677
#define configSYSTICK_CLOCK_HZ
Definition: port.c:82
#define portTASK_RETURN_ADDRESS
Definition: port.c:133
#define pdFALSE
Definition: projdefs.h:75
BaseType_t xTaskIncrementTick(void) PRIVILEGED_FUNCTION
Definition: tasks.c:1849
#define portENTER_CRITICAL()
Definition: portmacro.h:131
void(* TaskFunction_t)(void *)
Definition: projdefs.h:73
#define portNVIC_SYSTICK_INT_BIT
Definition: port.c:97
void vPortSetupTimerInterrupt(void)
eSleepModeStatus eTaskConfirmSleepModeStatus(void) PRIVILEGED_FUNCTION
#define portNVIC_SYSTICK_COUNT_FLAG_BIT
Definition: port.c:99
#define portNVIC_SYSTICK_CTRL_REG
Definition: port.c:92
__attribute__((naked))
Definition: port.c:391
#define portNVIC_IP_REGISTERS_OFFSET_16
Definition: port.c:108
#define portMAX_8_BIT_VALUE
Definition: port.c:110
#define portNVIC_SYSTICK_ENABLE_BIT
Definition: port.c:98
#define portMAX_24_BIT_NUMBER
Definition: port.c:120
portSTACK_TYPE StackType_t
Definition: portmacro.h:93
#define portNVIC_PENDSVSET_BIT
Definition: portmacro.h:116
#define portNVIC_INT_CTRL_REG
Definition: portmacro.h:115
uint32_t ulPortSetInterruptMask(void)
void vPortExitCritical(void)
Definition: port.c:380