SAM4S-EK_FreeRTOS+FAT-SL  1.0
An example project to test the functionality of FreeRTOS+FAT-SL using SD card as data storage medium
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SDdrv_f.c
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1 /*
2  * FreeRTOS+FAT SL V1.0.1 (C) 2014 HCC Embedded
3  *
4  * The FreeRTOS+FAT SL license terms are different to the FreeRTOS license
5  * terms.
6  *
7  * FreeRTOS+FAT SL uses a dual license model that allows the software to be used
8  * under a standard GPL open source license, or a commercial license. The
9  * standard GPL license (unlike the modified GPL license under which FreeRTOS
10  * itself is distributed) requires that all software statically linked with
11  * FreeRTOS+FAT SL is also distributed under the same GPL V2 license terms.
12  * Details of both license options follow:
13  *
14  * - Open source licensing -
15  * FreeRTOS+FAT SL is a free download and may be used, modified, evaluated and
16  * distributed without charge provided the user adheres to version two of the
17  * GNU General Public License (GPL) and does not remove the copyright notice or
18  * this text. The GPL V2 text is available on the gnu.org web site, and on the
19  * following URL: http://www.FreeRTOS.org/gpl-2.0.txt.
20  *
21  * - Commercial licensing -
22  * Businesses and individuals who for commercial or other reasons cannot comply
23  * with the terms of the GPL V2 license must obtain a commercial license before
24  * incorporating FreeRTOS+FAT SL into proprietary software for distribution in
25  * any form. Commercial licenses can be purchased from
26  * http://shop.freertos.org/fat_sl and do not require any source files to be
27  * changed.
28  *
29  * FreeRTOS+FAT SL is distributed in the hope that it will be useful. You
30  * cannot use FreeRTOS+FAT SL unless you agree that you use the software 'as
31  * is'. FreeRTOS+FAT SL is provided WITHOUT ANY WARRANTY; without even the
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33  * PARTICULAR PURPOSE. Real Time Engineers Ltd. and HCC Embedded disclaims all
34  * conditions and terms, be they implied, expressed, or statutory.
35  *
36  * http://www.FreeRTOS.org
37  * http://www.FreeRTOS.org/FreeRTOS-Plus
38  *
39  */
40 #include "api_mdriver.h"
41 #include "psp_string.h"
42 #include "HSMCI.h"
43 #include "sd_mmc_protocol.h"
44 
45 
46 /* The F_DRIVER structure that is filled with the SD versions of the read
47 sector, write sector, etc. functions. */
48 static F_DRIVER s_driver;
49 
50 /* Disk not initialized yet. */
51 static char in_use = 0;
52 
54 static uint16_t sd_mmc_nb_block_to_tranfer = 0;
56 static uint16_t sd_mmc_nb_block_remaining = 0;
57 //relative card address
58 uint16_t rca = 0;
59 //card specific data
60 uint8_t csd[CSD_REG_BSIZE];
61 //SD/MMC transfer rate unit codes (10K) list
62 const uint32_t sd_mmc_trans_units[7] = { 10, 100, 1000, 10000, 0, 0, 0 };
63 //SD transfer multiplier factor codes (1/10) list
64 const uint32_t sd_trans_multipliers[16] = { 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 };
65 //card capacity
66 uint32_t capacity;
67 //HSMCI clock and HS flag
68 uint32_t clock;
69 uint8_t high_speed;
70 
71 uint32_t sd_cmd8(uint8_t * v2)
72 {
73  uint32_t resp;
74 
75  *v2 = 0;
76  // Test for SD version 2
78  {
79  printf("SD card not v2\n\r");
80  return OK; // It is not a V2
81  }
82  // Check R7 response
83  resp = hsmci_get_response();
84  if (resp == 0xFFFFFFFF)
85  {
86  // No compliance R7 value
87  printf("SD card not v2\n\r");
88  return OK; // It is not a V2
89  }
91  {
92  return FAIL;
93  }
94  printf("SD card v2\n\r");
95  *v2 = 1;
96  return OK;
97 }
98 
108 uint32_t sd_mci_op_cond(uint8_t v2)
109 {
110  uint32_t arg, retry, resp;
111 
112  /*
113  * Timeout 1s = 400KHz / ((6+6+6+6)*8) cylces = 2100 retry
114  * 6 = cmd byte size
115  * 6 = response byte size
116  * 6 = cmd byte size
117  * 6 = response byte size
118  */
119  retry = 2100;
120  do
121  {
122  // CMD55 - Indicate to the card that the next command is an
123  // application specific command rather than a standard command.
125  {
126  return FAIL;
127  }
128 
129  // (ACMD41) Sends host OCR register
131  if (v2)
132  {
133  arg |= SD_ACMD41_HCS;
134  }
135  // Check response
137  {
138  return FAIL;
139  }
140  resp = hsmci_get_response();
141  if (resp & OCR_POWER_UP_BUSY)
142  {
143  // Card is ready
144  if ((resp & OCR_CCS) != 0)
145  {
146  //sd_mmc_card->type |= CARD_TYPE_HC;
147  printf("Card is High Capacity\n\r");
148  }
149  break;
150  }
151  if (retry-- == 0)
152  {
153  return FAIL;
154  }
155  } while (1);
156  return OK;
157 }
158 
162 void sd_decode_csd(void)
163 {
164  uint32_t unit;
165  uint32_t mul;
166  uint32_t tran_speed;
167 
168  // Get SD memory maximum transfer speed in Hz.
169  tran_speed = CSD_TRAN_SPEED(csd);
170  unit = sd_mmc_trans_units[tran_speed & 0x7];
171  mul = sd_trans_multipliers[(tran_speed >> 3) & 0xF];
172  clock = unit * mul * 1000;
173 
174  /*
175  * Get card capacity.
176  * ----------------------------------------------------
177  * For normal SD/MMC card:
178  * memory capacity = BLOCKNR * BLOCK_LEN
179  * Where
180  * BLOCKNR = (C_SIZE+1) * MULT
181  * MULT = 2 ^ (C_SIZE_MULT+2) (C_SIZE_MULT < 8)
182  * BLOCK_LEN = 2 ^ READ_BL_LEN (READ_BL_LEN < 12)
183  * ----------------------------------------------------
184  * For high capacity SD card:
185  * memory capacity = (C_SIZE+1) * 512K byte
186  */
188  {
189  capacity = (SD_CSD_2_0_C_SIZE(csd) + 1) * 512;
190  printf("CSD version 2.0\n\r");
191  printf("Card capacity is : %d KB\n\r",capacity);
192  }
193  else
194  {
195  uint32_t blocknr = ((SD_CSD_1_0_C_SIZE(csd) + 1) * (1 << (SD_CSD_1_0_C_SIZE_MULT(csd) + 2)));
196  capacity = blocknr * (1 << SD_CSD_1_0_READ_BL_LEN(csd)) / 1024;
197  }
198 }
199 
211 uint32_t sd_acmd51(void)
212 {
213  uint8_t scr[SD_SCR_REG_BSIZE];
214 
215  // CMD55 - Indicate to the card that the next command is an
216  // application specific command rather than a standard command.
218  {
219  return FAIL;
220  }
222  {
223  return FAIL;
224  }
225  if (!hsmci_start_read_blocks(scr, 1))
226  {
227  return FAIL;
228  }
230  {
231  return FAIL;
232  }
233 
234  // Get SD Memory Card - Spec. Version
235  switch (SD_SCR_SD_SPEC(scr))
236  {
238  //sd_mmc_card->version = CARD_VER_SD_1_0;
239  printf("SD spec. version 1.0\n\r");
240  break;
241 
242  case SD_SCR_SD_SPEC_1_10:
243  //sd_mmc_card->version = CARD_VER_SD_1_10;
244  printf("SD spec. version 1.1\n\r");
245  break;
246 
247  case SD_SCR_SD_SPEC_2_00:
249  {
250  //sd_mmc_card->version = CARD_VER_SD_3_0;
251  printf("SD spec. version 3.0\n\r");
252  }
253  else
254  {
255  //sd_mmc_card->version = CARD_VER_SD_2_0;
256  printf("SD spec. version 2.0\n\r");
257  }
258  break;
259 
260  default:
261  //sd_mmc_card->version = CARD_VER_SD_1_0;
262  printf("SD spec. version 1.0\n\r");
263  break;
264  }
265  return OK;
266 }
267 
273 uint32_t sd_acmd6(void)
274 {
275  // Define the data bus width to 4 bits bus
276  // CMD55 - Indicate to the card that the next command is an
277  // application specific command rather than a standard command.
279  {
280  return FAIL;
281  }
282  // 10b = 4 bits bus
284  {
285  return FAIL;
286  }
287  else
288  {
289  // Set 4-bit bus width
290  HSMCI->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_4;
291  printf("4-bit bus width enabled\n\r");
292  }
293  return OK;
294 }
295 
305 uint32_t sd_cm6_set_high_speed(void)
306 {
307  uint8_t switch_status[SD_SW_STATUS_BSIZE];
308 
317  SD_SW_STATUS_BSIZE, 1, OK))
318  {
319  printf("adtc command failed\n\r");
320  return FAIL;
321  }
322  if (!hsmci_start_read_blocks(switch_status, 1))
323  {
324  printf("CMD6 start read blocks error\n\r");
325  return FAIL;
326  }
328  {
329  printf("CMD6 wait end of read blocks error\n\r");
330  return FAIL;
331  }
332 
334  {
335  printf("%s: CMD6 CARD_STATUS_SWITCH_ERROR\n\r", __func__);
336  return FAIL;
337  }
339  {
340  // Not supported, it is not a protocol error
341  //return OK;
342  printf("SD_SW_STATUS_FUN_GRP_RC_ERROR\n\r");
343  }
344  if (SD_SW_STATUS_FUN_GRP1_BUSY(switch_status))
345  {
346  printf("%s: CMD6 SD_SW_STATUS_FUN_GRP1_BUSY\n\r", __func__);
347  return FAIL;
348  }
349  // CMD6 function switching period is within 8 clocks
350  // after the end bit of status data.
352  high_speed = 1;
353  clock *= 2;
354  printf("Clock set after CMD6 : %d Hz\n\r", clock);
355  return OK;
356 }
357 
364 uint32_t sd_mmc_cmd13(void)
365 {
366  uint32_t nec_timeout;
367 
368  /* Wait for data ready status.
369  * Nec timing: 0 to unlimited
370  * However a timeout is used.
371  * 200 000 * 8 cycles
372  */
373  nec_timeout = 200000;
374  do
375  {
377  {
378  return FAIL;
379  }
380  // Check busy flag
382  {
383  break;
384  }
385  if (nec_timeout-- == 0)
386  {
387  printf("%s: CMD13 Busy timeout\n\r", __func__);
388  return FAIL;
389  }
390  } while (1);
391 
392  return OK;
393 }
394 
395 /****************************************************************************
396  * Read one sector
397  ***************************************************************************/
398 uint32_t sd_mmc_start_read_block(F_DRIVER * driver, void *dest, uint16_t nb_block)
399 {
400  uint16_t s;
401  uint32_t resp, sr;
402  //maximum blocks in SD
403  uint32_t maxsector = ((capacity * 1024) / SD_MMC_BLOCK_SIZE);
404 
405  /* Not used. */
406  ( void ) driver;
407 
408  if (nb_block >= maxsector)
409  {
410  printf("Block to read >= Maxsector\n\r");
411  return SD_READ_FAIL;
412  }
413 
414  if( in_use == 0 )
415  {
416  printf("Device not initialized\n\r");
417  return SD_READ_FAIL;
418  }
419 
420  if (!sd_mmc_cmd13())
421  {
422  printf("CMD13 data ready error\n\r");
423  return SD_READ_FAIL;
424  }
425 
426  /* Locate offset into flash for block. */
427  s += nb_block;
428 
429  HSMCI->HSMCI_MR = HSMCI_MR_PDCMODE | HSMCI_MR_WRPROOF | HSMCI_MR_RDPROOF;
430  HSMCI->HSMCI_BLKR = HSMCI_BLKR_BLKLEN(SD_MMC_BLOCK_SIZE);
431  // Configure PDC transfer
432  HSMCI->HSMCI_RPR = (uint32_t) dest;
433  HSMCI->HSMCI_RCR = ((SD_MMC_BLOCK_SIZE) / 4);
434  // Start transfer
435  HSMCI->HSMCI_PTCR = HSMCI_PTCR_RXTEN;
436  // Block Address
437  HSMCI->HSMCI_ARGR = s;
438 
439  HSMCI->HSMCI_CMDR = HSMCI_CMDR_CMDNB(SDMMC_CMD17_READ_SINGLE_BLOCK)
440  | HSMCI_CMDR_MAXLAT
441  | HSMCI_CMDR_RSPTYP_48_BIT
442  | HSMCI_CMDR_TRTYP_SINGLE
443  | HSMCI_CMDR_TRDIR_READ
444  | HSMCI_CMDR_TRCMD_START_DATA
445  | HSMCI_CMDR_SPCMD_STD;
446 
447  // Wait end of command
448  do
449  {
450  sr = HSMCI->HSMCI_SR;
451  if (HSMCI->HSMCI_CMDR & SDMMC_RESP_CRC)
452  {
453  if (sr & (HSMCI_SR_CSTOE | HSMCI_SR_RTOE | HSMCI_SR_RENDE | HSMCI_SR_RCRCE | HSMCI_SR_RDIRE | HSMCI_SR_RINDE))
454  {
455  hsmci_reset();
456  printf("HSMCI CMDR CRC error \n\r");
457  return SD_READ_FAIL;
458  }
459  }
460  } while (!(sr & HSMCI_SR_CMDRDY));
461 
462  if (HSMCI->HSMCI_CMDR & SDMMC_RESP_BUSY)
463  {
464  if (!hsmci_wait_busy())
465  {
466  printf("HSMCI CMDR wait busy error \n\r");
467  return SD_READ_FAIL;
468  }
469  }
470 
471  while(HSMCI_SR_ENDRX != (HSMCI->HSMCI_SR & HSMCI_SR_ENDRX));
472 
473  return SD_READ_OK;
474 }
475 /****************************************************************************
476  * Write one sector
477  ***************************************************************************/
478 uint32_t sd_mmc_start_write_block(F_DRIVER * driver, void *src, uint16_t nb_block)
479 {
480  uint16_t d;
481  uint32_t resp, sr;
482  //maximum blocks in SD
483  uint32_t maxsector = ((capacity * 1024) / SD_MMC_BLOCK_SIZE);
484 
485  /* Not used. */
486  ( void ) driver;
487 
488  if (nb_block >= maxsector)
489  {
490  printf("Block to write >= Maxsector\n\r");
491  return SD_WRITE_FAIL;
492  }
493 
494  if( in_use == 0 )
495  {
496  printf("Device not initialized\n\r");
497  return SD_WRITE_FAIL;
498  }
499 
500  /* Locate offset into flash for block. */
501  d += nb_block;
502 
503  HSMCI->HSMCI_MR = HSMCI_MR_PDCMODE | HSMCI_MR_WRPROOF | HSMCI_MR_RDPROOF;
504  HSMCI->HSMCI_BLKR = HSMCI_BLKR_BLKLEN(SD_MMC_BLOCK_SIZE);
505  // Configure PDC transfer
506  HSMCI->HSMCI_TPR = (uint32_t) src;
507  HSMCI->HSMCI_TCR = ((SD_MMC_BLOCK_SIZE) / 4);
508  // Start transfer
509  HSMCI->HSMCI_PTCR = HSMCI_PTCR_TXTEN;
510  // Block Address
511  HSMCI->HSMCI_ARGR = d;
512 
513  HSMCI->HSMCI_CMDR = HSMCI_CMDR_CMDNB(SDMMC_CMD24_WRITE_BLOCK)
514  | HSMCI_CMDR_MAXLAT
515  | HSMCI_CMDR_RSPTYP_48_BIT
516  | HSMCI_CMDR_TRTYP_SINGLE
517  | HSMCI_CMDR_TRDIR_WRITE
518  | HSMCI_CMDR_TRCMD_START_DATA
519  | HSMCI_CMDR_SPCMD_STD;
520 
521  // Wait end of command
522  do
523  {
524  sr = HSMCI->HSMCI_SR;
525  if (HSMCI->HSMCI_CMDR & SDMMC_RESP_CRC)
526  {
527  if (sr & (HSMCI_SR_CSTOE | HSMCI_SR_RTOE | HSMCI_SR_RENDE | HSMCI_SR_RCRCE | HSMCI_SR_RDIRE | HSMCI_SR_RINDE))
528  {
529  hsmci_reset();
530  printf("HSMCI CMDR CRC error \n\r");
531  return SD_WRITE_FAIL;
532  }
533  }
534  } while (!(sr & HSMCI_SR_CMDRDY));
535 
536  if (HSMCI->HSMCI_CMDR & SDMMC_RESP_BUSY)
537  {
538  if (!hsmci_wait_busy())
539  {
540  printf("HSMCI CMDR wait busy error \n\r");
541  return SD_WRITE_FAIL;
542  }
543  }
544 
545  while(HSMCI_SR_NOTBUSY != (HSMCI->HSMCI_SR & HSMCI_SR_NOTBUSY));
546  return SD_WRITE_OK;
547 }
548 
549 
550 /****************************************************************************
551  *
552  * sd_getphy
553  *
554  * determinate sd drive physicals
555  *
556  * INPUTS
557  *
558  * driver - driver structure
559  * phy - this structure has to be filled with physical information
560  *
561  * RETURNS
562  *
563  * error code or zero if successful
564  *
565  ***************************************************************************/
566 static int sd_getphy ( F_DRIVER * driver, F_PHY * phy )
567 {
568  /* Not used. */
569  ( void ) driver;
570 
571  phy->number_of_sectors = ((capacity * 1024)/SD_MMC_BLOCK_SIZE);
573 
574  return SD_READ_OK;
575 }
576 
577 /****************************************************************************
578  *
579  * sd_release
580  *
581  * Releases a drive
582  *
583  * INPUTS
584  *
585  * driver_param - driver parameter
586  *
587  ***************************************************************************/
588 static void sd_release ( F_DRIVER * driver )
589 {
590  /* Not used. */
591  ( void ) driver;
592 
593  /* Disk no longer in use. */
594  in_use = 0;
595 }
596 
597 /****************************************************************************
598  *
599  * sd_init
600  *
601  * this init function has to be passed for high level to initiate the
602  * driver functions
603  *
604  * INPUTS
605  *
606  * driver_param - driver parameter
607  *
608  * RETURNS
609  *
610  * driver structure pointer
611  *
612  ***************************************************************************/
613 F_DRIVER * sd_init ( unsigned long driver_param )
614 {
615  ( void ) driver_param;
616 
617  if( in_use )
618  return NULL;
619 
622  s_driver.getphy = sd_getphy;
623  s_driver.release = sd_release;
624 
625  //SD card version 2
626  uint8_t v2 = 0;
627 
628  // Card need of 74 cycles clock minimum to start
630 
631  // CMD0 - Reset all cards to idle state.
633  {
634  printf("CMD0 failed\n\r");
635  return FAIL;
636  }
637 
638  // Test SD card for voltage compatibility
639  if (!sd_cmd8(&v2))
640  {
641  //return FAIL;
642  printf("CMD8 failed\n\r");
643  }
644 
645  // Try to get the SD card's operating condition
646  if (!sd_mci_op_cond(v2))
647  {
648  //It is not a SD card
649  //return FAIL;
650  printf("Not a valid SD card\n\r");
651  }
652 
653  // SD MEMORY, Put the Card in Identify Mode
654  // Note: The CID is not used in this stack
656  {
657  printf("CMD2 failed\n\r");
658  return FAIL;
659  }
660  // Ask the card to publish a new relative address (RCA).
662  {
663  printf("CMD3 failed\n\r");
664  return FAIL;
665  }
666  rca = ((hsmci_get_response() >> 16) & 0xFFFF);
667  printf("Card relative address is : %d\n\r", rca);
668 
669  // SD MEMORY, Get the Card-Specific Data
671  {
672  printf("CMD9 failed\n\r");
673  return FAIL;
674  }
676  sd_decode_csd();
677 
678  // Select the SD card and put it into Transfer Mode
680  {
681  printf("Failed to execute CMD7\n\r");
682  return FAIL;
683  }
684 
685  // SD MEMORY, Read the SCR to get card version
686  if (!sd_acmd51())
687  {
688  //return FAIL;
689  printf("ACMD51 failed\n\r");
690  }
691 
692  // TRY to enable High-Speed Mode
693  if (!sd_cm6_set_high_speed())
694  {
695  //return FAIL;
696  printf("High Speed not set\n\r");
697  }
698  else
699  {
701  // Set power saving to maximum value
702  //HSMCI->HSMCI_MR = HSMCI_MR_PWSDIV(0x07);
703  //HSMCI->HSMCI_CR = HSMCI_CR_PWSEN;
704  printf("Card switched to HS mode\n\r");
705  }
706 
707  // Set bus width to 4-bit
708  if (!sd_acmd6())
709  {
710  //return FAIL;
711  printf("ACMD6 failed\n\r");
712  }
713 
714  // SD MEMORY, Set default block size
716  {
717  //return FAIL;
718  printf("CMD16 failed\n\r");
719  }
720  printf("Card relative address is : %d\n\r", rca);
721 
722  in_use = 1;
723 
724  return &s_driver;
725 }
726 
727 
728 
uint32_t sd_acmd51(void)
ACMD51 - Read the SD Configuration Register.
Definition: SDdrv_f.c:211
#define SD_CMD6_GRP5_NO_INFLUENCE
CMD6 arg[19:16] function group 5, 0xF or 0x0.
uint32_t hsmci_adtc_start(uint32_t cmd, uint32_t arg, uint16_t block_size, uint16_t nb_block, uint32_t access_block)
Send an ADTC command on the selected slot An ADTC (Addressed Data Transfer Commands) command is used ...
Definition: HSMCI.c:324
#define SD_MMC_VOLTAGE_SUPPORT
Definition: HSMCI.h:15
uint32_t hsmci_wait_end_of_read_blocks(void)
Wait the end of transfer initiated by mci_start_read_blocks()
const uint32_t sd_trans_multipliers[16]
Definition: SDdrv_f.c:64
SD/MMC protocol definitions.
#define SD_CSD_1_0_C_SIZE_MULT(csd)
uint32_t sd_cmd8(uint8_t *v2)
Definition: SDdrv_f.c:71
#define SD_ACMD51_SEND_SCR
#define SD_CMD8_MASK_PATTERN
#define SDMMC_CMD17_READ_SINGLE_BLOCK
uint32_t sd_mmc_cmd13(void)
CMD13 - Addressed card sends its status register. This function waits the clear of the busy flag...
Definition: SDdrv_f.c:364
#define SD_SW_STATUS_FUN_GRP1_BUSY(status)
int printf(const char *format,...)
uint16_t rca
Definition: SDdrv_f.c:58
#define SD_CMD8_SEND_IF_COND
#define SDMMC_MCI_CMD0_GO_IDLE_STATE
#define SD_CMD6_MODE_SWITCH
#define SD_ACMD6_SET_BUS_WIDTH
#define SDMMC_CMD55_APP_CMD
unsigned short bytes_per_sector
Definition: api_mdriver.h:62
#define SD_MCI_ACMD41_SD_SEND_OP_COND
void hsmci_select_device(uint8_t slot, uint32_t clock, uint8_t bus_width, uint32_t high_speed)
Select a slot and initialize it.
Definition: HSMCI.c:226
#define CSD_REG_BSIZE
16 bytes
#define SD_SCR_SD_SPEC_1_10
#define SD_SW_STATUS_FUN_GRP_RC_ERROR
F_GETPHY getphy
Definition: api_mdriver.h:91
void hsmci_reset(void)
Reset the HSMCI interface.
Definition: HSMCI.c:22
#define SD_CMD8_HIGH_VOLTAGE
#define SD_CMD6_GRP4_NO_INFLUENCE
CMD6 arg[15:12] function group 4, 0xF or 0x0.
#define SDMMC_RESP_BUSY
Card may send busy.
uint32_t sd_mci_op_cond(uint8_t v2)
Ask to all cards to send their operations conditions (MCI only).
Definition: SDdrv_f.c:108
#define SD_SCR_SD_SPEC(scr)
const uint32_t sd_mmc_trans_units[7]
Definition: SDdrv_f.c:62
#define CARD_STATUS_READY_FOR_DATA
#define SD_WRITE_OK
Definition: HSMCI.h:26
#define SDMMC_CMD24_WRITE_BLOCK
#define SDMMC_RESP_CRC
Expect valid crc (MCI only)
uint32_t sd_mmc_start_read_block(F_DRIVER *driver, void *dest, uint16_t nb_block)
Definition: SDdrv_f.c:398
#define CSD_TRAN_SPEED(csd)
#define SDMMC_CMD7_SELECT_CARD_CMD
#define SD_SW_STATUS_BSIZE
64 bytes
#define SD_SCR_SD_SPEC_2_00
#define SDMMC_CMD2_ALL_SEND_CID
#define CSD_STRUCTURE_VERSION(csd)
#define SDMMC_CMD16_SET_BLOCKLEN
#define OCR_CCS
#define SD_SCR_SD_SPEC_1_0_01
unsigned long number_of_sectors
Definition: api_mdriver.h:59
#define SD_SCR_REG_BSIZE
8 bytes
uint32_t hsmci_start_read_blocks(void *dest, uint16_t nb_block)
Start a read blocks transfer on the line Note: The driver will use the DMA available to speed up the ...
#define FAIL
Definition: HSMCI.h:24
uint32_t hsmci_get_response(void)
Return the 32 bits response of the last command.
Definition: HSMCI.c:301
uint8_t csd[CSD_REG_BSIZE]
Definition: SDdrv_f.c:60
#define SD_READ_OK
Definition: HSMCI.h:25
#define SD_CMD6_GRP6_NO_INFLUENCE
CMD6 arg[23:20] function group 6, 0xF or 0x0.
F_READSECTOR readsector
Definition: api_mdriver.h:90
#define SD_WRITE_FAIL
Definition: HSMCI.h:28
uint32_t clock
Definition: SDdrv_f.c:68
#define SD_CSD_1_0_READ_BL_LEN(csd)
#define SD_CMD6_GRP1_HIGH_SPEED
CMD6 arg[ 3: 0] function group 1, access mode.
void hsmci_get_response_128(uint8_t *response)
Return the 128 bits response of the last command.
Definition: HSMCI.c:306
#define SD_READ_FAIL
Definition: HSMCI.h:27
#define SD_CMD8_PATTERN
#define SD_SCR_SD_SPEC_3_00
F_RELEASE release
Definition: api_mdriver.h:93
F_WRITESECTOR writesector
Definition: api_mdriver.h:89
#define OK
Definition: HSMCI.h:23
#define SD_SW_STATUS_FUN_GRP1_RC(status)
#define SD_CMD6_GRP2_DEFAULT
uint8_t high_speed
Definition: SDdrv_f.c:69
#define SD_CMD6_SWITCH_FUNC
#define OCR_POWER_UP_BUSY
#define SD_CSD_VER_2_0
#define SD_MMC_BLOCK_SIZE
Definition: HSMCI.h:17
uint32_t sd_mmc_start_write_block(F_DRIVER *driver, void *src, uint16_t nb_block)
Definition: SDdrv_f.c:478
#define SD_CMD6_GRP3_NO_INFLUENCE
CMD6 arg[11: 8] function group 3, 0xF or 0x0.
uint32_t capacity
Definition: SDdrv_f.c:66
F_DRIVER * sd_init(unsigned long driver_param)
Definition: SDdrv_f.c:613
#define SD_ACMD41_HCS
#define SD_CSD_1_0_C_SIZE(csd)
void hsmci_send_clock(void)
Send 74 clock cycles on the line of selected slot Note: It is required after card plug and before car...
Definition: HSMCI.c:277
void sd_decode_csd(void)
Decodes SD CSD register.
Definition: SDdrv_f.c:162
#define SDMMC_MCI_CMD9_SEND_CSD
uint32_t hsmci_wait_busy(void)
Wait the end of busy signal on data line.
Definition: HSMCI.c:79
#define SD_CMD8_MASK_VOLTAGE
#define SDMMC_MCI_CMD13_SEND_STATUS
uint32_t hsmci_send_cmd(uint32_t cmd, uint32_t arg)
Send a command on the selected slot.
Definition: HSMCI.c:289
#define SD_SCR_SD_SPEC3(scr)
#define SD_CMD3_SEND_RELATIVE_ADDR
uint32_t sd_acmd6(void)
ACMD6 - Define the data bus width to 4 bits bus.
Definition: SDdrv_f.c:273
#define CARD_STATUS_SWITCH_ERROR
uint32_t sd_cm6_set_high_speed(void)
CMD6 for SD - Switch card in high speed mode.
Definition: SDdrv_f.c:305
#define SD_CSD_2_0_C_SIZE(csd)